cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 1/8 MTB6D0N03BI3 cystek product specification n-channel logic level enhancement mode power mosfet MTB6D0N03BI3 features ? single drive requirement ? low on-resistance ? fast switching characteristic ? repetitive avalanche rated ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTB6D0N03BI3-0-ua-g to-251 (rohs compliant and halogen-free package) 80 pcs/tube, 50 tubes/box MTB6D0N03BI3 to-251 g gate d drain s source bv dss 30v i d @ v gs =10v, t a =25 c 12a i d @ v gs =10v, t c =25 c 44a v gs =10v, i d =25a 7.1m r dson(typ) v gs =4.5v, i d =15a 10.0m g d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, ua : 80 pcs / tube, 50 tubes/box product rank, zero for no rank products product name
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 2/8 MTB6D0N03BI3 cystek product specification absolute maximum ratings (ta=25 c, unless otherwise specified) parameter symbol limits unit drain-source voltage v ds 30 gate-source voltage v gs 20 v continuous drain current @ v gs =10v, t c =25 c 44 continuous drain current @ v gs =10v, t c =100 c 28 continuous drain current @ v gs =10v, t a =25 c 12 continuous drain current @ v gs =10v, t a =70 c i d 9.6 pulsed drain current i dm 176 *1 a avalanche energy @ l=0.1mh, i d= 30a, v dd =15v e as 45 *3 repetitive avalanche energy @ l=0.05mh e ar 3.3 mj t c =25 33 t c =100 p d 13.2 t a =25 2.5 *2 total power dissipation t a =70 p dsm 1.6 *2 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r jc 3.8 thermal resistance, junction-to-ambient, max r ja 50 *2 c/w note : 1. pulse width limited by maximum junction temperature. 2. surface mounted on a 1 in2 pad of 2oz copper. in practice r th,j-a will be determined by customer?s pcb characteristics. 125 c/w when mounted on a minimum pad of 2 oz. copper. 3. 100% tested by conditions of l=0.1mh, i as =10a, v gs =10v, v dd =15v, rated 30v characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 30 - - v gs =0v, i d =250 a v gs(th) 1 - 2.5 v v ds = v gs , i d =250 a g fs *1 - 25 - s v ds =5v, i d =15a i gss - - 100 na v gs = 20v, v ds =0v - - 1 v ds =24v, v gs =0v i dss - - 10 a v ds =24v, v gs =0v, tj=85 c - 7.1 9 v gs =10v, i d =25a r ds(on) *1 - 10 15 m v gs =4.5v, i d =15a dynamic ciss - 803 - coss - 186 - crss - 106 - pf v ds =15v, v gs =0v, f=1mhz qg *1, 2 - 8 - qgs *1, 2 - 2.5 - qgd *1, 2 - 3.8 - nc v ds =20v, v gs =4.5v, i d =33a
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 3/8 MTB6D0N03BI3 cystek product specification characteristics (t c =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions t d(on) *1, 2 - 7.6 - tr *1, 2 - 12.6 - t d(off) *1, 2 - 26.2 - t f *1, 2 - 7.8 - ns v ds =15v, i d =33a, v gs =10v, r gs =3.3 rg - 1.9 - f=1mhz source-drain diode i s *1 - - 44 i sm *3 - - 176 a v sd *1 - 0.88 1.3 v i s =25a, v gs =0v trr - 11 - ns qrr - 5.1 - nc i f =20a, di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature.
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 4/8 MTB6D0N03BI3 cystek product specification typical characteristics typical output characteristics 0 20 40 60 80 100 120 140 0246810 v ds , drain-source voltage(v) i d , drain current(a) 10v, 9v, 8v, 7v, 6v 3.5v 4v v gs =3v 5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =10v v gs =3v v gs =4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 4 8 12 16 20 i dr , reverse drain current(a) v sd , source-drain voltage(v) tj=25c tj=150c static drain-source on-state resistance vs gate-source voltage 0 10 20 30 40 50 0246810 v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =25a drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =10v, i d =25a r ds( on) @tj=25c : 7.1 m typ
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 5/8 MTB6D0N03BI3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0 5 10 15 20 25 30 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss f=1mhz threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 i d , drain current(a) g fs , forward transfer admittance(s) v ds =5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0481216 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =33a v ds =15v v ds =20v maximum safe operating area 0.1 1 10 100 1000 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) dc 10ms 100ms 1ms 100 s r ds( on) limited t c =25c, tj=150c v gs =10v,r jc =3.8c/w single pulse 1s 10 s maximum drain current vs case temperature 0 5 10 15 20 25 30 35 40 45 50 25 50 75 100 125 150 175 t c , case temperature(c) i d , maximum drain current(a) v gs =10v, r jc =3.8c/w
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 6/8 MTB6D0N03BI3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 20 40 60 80 100 120 140 0123456 v gs , gate-source voltage(v) i d , drain current (a) v ds =10v single pulse power rating, junction to ambient (note on page 2) 0 300 600 900 1200 1500 1800 2100 2400 2700 3000 0.0001 0.001 0.01 0.1 1 10 pulse width(s) power (w) t j(max) =150c t c =25c r jc =3.8c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-05 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r jc (t)=r(t)*r jc 2.duty factor, d=t1/t2 3.t jm -t c =p dm *r jc (t) 4.r jc =3.8c/w
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 7/8 MTB6D0N03BI3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : ca00i3 issued date : 2017.12.11 revised date : page no. : 8/8 MTB6D0N03BI3 cystek product specification to-251 dimension inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.250 0.262 6.350 6.650 j 0.213 0.224 5.400 5.700 b 0.205 0.213 5.200 5.400 k 0.295 0.311 7.500 7.900 c 0.571 0.587 14.500 14.900 l 0.042 0.054 1.050 1.350 d 0.028 0.035 0.700 0.900 m 0.017 0.023 0.430 0.580 e 0.020 0.028 0.500 0.700 n 0.118 ref 3.000 ref f 0.091 typ 2.300 typ s 0.197 ref 5.000 ref g 0.091 typ 2.300 typ t 0.150 ref 3.800 ref h 0.017 0.023 0.430 0.580 u 0.055 ref 1.400 ref i 0.087 0.094 2.200 2.400 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-251 plastic package cystek packa g e code: i3 marking: b6d0 n03b product n ame date code 1 2 3 4
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